What question did this study set out to answer?

This study aims to establish a framework for understanding semiconductor technology evolution using the Information-Theoretic Unification (ITU) principle.

May 16, 2026Open Access

ITU and Semiconductors: A Single-Axiom Foundation for Devices, Scaling, Beyond-CMOS, and the 2026-2040 Roadmap

Key Points

This study aims to establish a framework for understanding semiconductor technology evolution using the Information-Theoretic Unification (ITU) principle.
Applied ITU framework to analyze semiconductor transistors.
Benchmarking of eight beyond-CMOS device classes on a unified ITU figure-of-merit.
Developed numeric experiments and predictions to assess technology scaling and roadmaps.
Photonic computing exhibits a figure of merit ~17,500x compared to CMOS.
Semiconductor market expected to reach $1 trillion by 2030 and $2 trillion by 2040.
Roadmap forecasts a process node limit of ~0.5 nm by 2040.

Abstract

We apply the Information-Theoretic Unification (ITU) framework (Terada 2026, DOI 10. 5281/zenodo. 20109210) to semiconductor transistors. The single ITU axiom dS = d governs the Landauer minimum bit-erasure energy, the Boltzmann subthreshold-swing tyranny, the 3D scaling progression (FinFET -> GAAFET -> CFET), and the beyond-CMOS device landscape. This is Tier 1 paper #4, completing the ITU engineering rectangle: Quantum Computing (Tier 1 #1, DOI 10. 5281/zenodo. 20139391) + Machine Consciousness / ASI (#2, DOI 10. 5281/zenodo. 20150501) + Cryptography (#3, DOI 10. 5281/zenodo. 20151059) + Semiconductors (this paper) as physical substrate. Phase 55: ITU foundation. Landauer kB T ln 2 limit (17. 9 meV at 300 K) and 60 mV/decade Boltzmann tyranny shown as thermal-KA consequences. Moore + Koomey trends leave ~2. 5 decades of improvement before Landauer limit. Phase 56: FinFET -> GAAFET -> CFET as ITU eta-maximisation (gate coupling area per channel volume). WKB tunneling ends classical MOSFET below 1 nm. Sharvin contact resistance quantises at h/ (2e²) = 12. 9 kOhm below 25 nm². Phase 57: Eight beyond-CMOS device classes benchmarked on a unified ITU figure-of-merit. Photonic computing wins with FoM ~17, 500x CMOS, driven by h*nu >> kB T non-thermal KA. Heterogeneous SoCs dominate the 2030s. Phase 58: 2026-2040 industry roadmap. Logistic adoption for seven beyond-CMOS technologies. Process node floor ~0. 5 nm. Semiconductor TAM reaches 1 trillion by 2030, 2 trillion by 2040. Taiwan share drops 55% -> 36% through geopolitical diversification. 10 falsifiable predictions issued. Central thesis: under ITU, the transistor is a 1-bit QECC against kB T noise; 3D wrapping reflects KA area maximisation; beyond-CMOS winners require non-thermal KA. Honest framing: this is a Pass-1 interpretive paper reframing known semiconductor physics within ITU; novel predictions distinguishing ITU from standard physics await Pass-2 work. Includes 4 theory documents, 4 Python numerical experiments, 4 figures, 4 JSON summaries. Total runtime ~30 seconds.

ITU and Semiconductors: A Single-Axiom Foundation for Devices, Scaling, Beyond-CMOS, and the 2026-2040 Roadmap

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