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A feed-back-based modulation technique is developed which can reduce the oscillation of the neutral point voltage to a great deal. It is free of DC offset and AC ripple on the neutral point of the neutral point clamped (NPC) inverter. Due to its improved harmonic reduction and loss minimization characteristics, this NPC inverter is employed in high-power applications. Conventional digitally adjusted pulse-width modulation (DPWM) cannot balance neutral point voltage under the full range of modulation index and power factor. In comparison to conventional space vector PWM (CSVPWM), sixty-degree bus clamping PWM (SDBCPWM), and thirty-degree bus clamping PWM (TDBCPWM), the suggested approach has a greater reduction capability. The total harmonic distortion (THD) and switching loss of the proposed technique are deducted, compared with others and the outcome was pleasant. The inheritance problem of voltage unbalancing at the neutral point of the inverter because of split DC link capacitors is also countered.
Uddin et al. (Thu,) studied this question.