Double-Gate MOSFETs The cover art illustrates sub-5 nm double-gate metal-oxide-semiconductor field-effect transistors utilizing 2D silicon arsenide monolayers as channel materials. These transistors exhibit superior performance and energy efficiency, meeting the ITRS 2028 requirements. The study highlights the potential of 2D semiconductors and underlap engineering to overcome scaling limits in next-generation nanoelectronics. More information can be found in the Research Article by Engin Durgun and Dogukan Hazar Ozbey (10.1002/aelm.202500701).
Özbey et al. (Sun,) studied this question.