This paper presents the analysis, design, and experimental validation of a Partial Power Processing (PPP) Single-Ended Primary Inductor Converter (SEPIC) for photovoltaic (PV) applications. The proposed topology limits the fraction of processed power through the active switching stage, thereby reducing MOSFET RMS current and associated conduction losses and improving overall conversion efficiency. A complete analytical framework is developed, including steady-state modeling, state-space formulation, and small-signal analysis. The theoretical results are validated through MATLAB/Simulink simulations and laboratory-scale experimental tests under multiple loading conditions. Comparative analysis against a conventional Full Power Processing (FPP) SEPIC converter demonstrates that the proposed PPP configuration achieves efficiencies up to 95% in simulation and up to 93% experimentally, compared to 87% for the FPP counterpart under identical nominal conditions (Vin=18 V, fs=70 kHz). Additionally, the PPP approach reduces the MOSFET RMS current by more than 50%, which directly translates into lower conduction losses and reduced device power dissipation. The results confirm that the proposed PPP-SEPIC converter constitutes a technically viable and energy-efficient solution for photovoltaic DC–DC power conversion systems.
Rebullosa-Castillo et al. (Mon,) studied this question.