Abstract The EDFAS International Roadmap for Failure Analysis (IRFA) Die-Level Roadmap Council (DLRC) presents its strategic outlook for electrical fault isolation over the next five years, driven by the rapid proliferation of gate-all-around transistors, backside power delivery, heterogeneous integration, and AI-driven design. Across six identified innovation domains — tool development for technology scaling and heterogeneous packaging, workflow evolution, test and diagnostics integration into early design, AI and software tools, and emerging areas — the article maps both the growing limitations of current techniques and the solutions being pursued.
Dickson et al. (Fri,) studied this question.