Fully Integrated High Efficiency Doherty Digital Power Amplifier With Double‐Transformer Matching Network

This paper proposes an on‐chip fully integrated Doherty architecture digital power amplifier (DPA), which has the characteristics of high efficiency and can be applied to the polarization transmitter system. The DPA is based on switched‐capacitor and nonoverlapping clock technology, and adopts the voltage‐mode Doherty architecture to greatly improve the system efficiency and saturated output power of the DPA. The saturated output power is greatly improved by combining the amplifier unit with the cascode structure and the matching network through the double‐transformer power synthesis. The DPA is implemented using a CMOS 65 nm process. Under the standard power supply voltage and on‐chip matching network, the DPA achieves a saturation power of 25.5 dBm at 2.4 GHz with a peak system efficiency of 37.3% and a 6 dB system back‐off efficiency of 29%. At the same time, the DPA demonstrates superior amplitude modulation (AM)‐AM distortion performance and an AM‐phase modulation (PM) distortion of 13°. The chip size is 1.46 mm 2 including the I/O pads.