Novel strategy implements ReLU activation in kagome transistors, suggesting improved energy efficiency for analog computing.
With the growing demand for high‐performance computing in deep learning, energy‐efficient analog computing has emerged as a promising alternative to conventional energy‐intensive digital processing. A major obstacle in this field is the physical realization of activation functions, due to the lack of analog f (FETs) that inherently exhibit the desired piecewise‐linear transfer characteristics. Here, a novel strategy is presented for implementing the Rectified Linear Unit (ReLU) activation function by exploiting the high density of states (DOS) associated with van Hove singularities (vHs), induced by flat bands in a kagome semiconductor Nb 3 Cl 8 FET. This vHs‐enhanced DOS imparts pronounced piecewise‐linear transfer behavior at low temperatures, effectively mimicking the ReLU function. To enable room‐temperature operation, the origin of the hysteresis commonly observed in Nb 3 Cl 8 FETs is identified and addressed. Temperature‐dependent and time‐resolved measurements attribute the hysteresis to charge trapping at the Nb 3 Cl 8 –substrate interface. By introducing a hexagonal boron nitride (h‐BN) buffer layer, the hysteresis is successfully suppressed, achieving stable and highly linear transfer characteristics at room temperature. These results demonstrate the potential of vHs‐engineered electronic states for the physical implementation of analog activation functions, offering a pathway toward compact, high‐density, and energy‐efficient hardware for analog deep learning accelerators.
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Meng et al. (2025) studied this question.
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