Efficient and Low-Cost Modular Polynomial Multiplier for WSN Security

Wireless Sensor Network (WSN) technology has constrained computing resources that require efficient and low-cost cryptographic hardware to provide security services, particularly when dealing with large modular polynomial multiplication in cryptography. In this paper, a cost-efficient reconfigurable Karatsuba modular polynomial multiplier is proposed for general modulus polynomials. The modulus polynomial can be changed easily depending on the application. The proposed modular polynomial multiplier is synthesized and simulated by the AMD Vivado Design Tool. The design’s performance on ADP (Area Delay Product) has been improved compared to previous designs. It can be applied in ECC encryption to speed up the security services in WSN.