Alleviation of self-heating degradation in polycrystalline silicon thin-film transistors via voltage pulse modulation

This work presents a voltage pulse modulation strategy to effectively mitigate self-heating degradation in polycrystalline silicon thin-film transistors. By applying synchronized voltage stress (SVS) with optimized pulse parameters, the proposed method significantly suppresses channel temperature buildup and reduces device degradation. A predictive thermal model, rigorously validated through coupled simulations and experimental measurements, enables precise control of temperature dynamics under diverse operating conditions. Experimental demonstrations using light-emitting diode-integrated driver circuits reveal substantially improved operational stability under SVS, in sharp contrast to the rapid performance degradation observed with continuous stress. This purely electrical approach requires no structural modifications and offers a practical and cost-effective solution to enhance the reliability of advanced display technologies.