Development of an interposer based pixel readout for CEPC TPC

The paper presents the development of an interposer-based pixel readout with sub-millimeter size for the CEPC (Circular Electron Positron Collider) TPC (Time Projection Chamber). A low-power pixel readout ASIC named TEPIX has been developed and tested. It integrates 128-channel front-end electronics, including the analog front-end and the amplitude and timing digitizer. The noise was measured to be 300 e, and the power consumption was measured to be 0.3 mW/ch. A prototyper interposer has also been designed with 32 × 32 pixels read out by 8 TEPIX (Timing and Energy PIXel readout) chips. The pixel size is 500 μm × 500 μm. More design details and test results will be given in this paper.