Statistical analysis of spurious dot formation in silicon metal-oxide-semiconductor single electron transistors

The presence of spurious quantum dots in silicon-based spin qubit devices is a challenge for quantum system scalability. The authors use here electrostatic triangulation to statistically analyse their spatial distribution in silicon metal-oxide-semiconductor (SiMOS) single-electron transistors (SETs), fabricated on an industrial 300-mm process. By combining experimental mapping with simulations, they reveal that spurious dots primarily arise from strain and gate bias effects. This insight informs device design strategies to mitigate spurious dots while preserving tunability, advancing scalable silicon-based quantum technologies.