This research investigates the effects of annealing on wafer warpage and SiO2 film characteristics, indicating optimization potential for semiconductor manufacturing.
The stress and wafer warpage of Plasma Enhanced Chemical Vapor Deposition (PECVD) fabricated SiO2 solid film are critical factors in high-vacuum semiconductor Integrated Circuit (IC) manufacturing during annealing. This work investigates the annealing of PECVD-grown SiO2 solid films (using TEOS precursor, Si(OC2H5)4) in a nitrogen (N2) atmosphere. We systematically studied the effects of annealing temperature and time on wafer warpage and explored the underlying change mechanisms using multiple characterization techniques. Results show that wafer warpage of SiO2 solid film decreases initially and then increases with rising annealing temperature. The optimal condition for minimizing warpage is 550℃/6 hours. To understand microstructural changes, including chemical bond rearrangement and film characteristics, during annealing, we employed Patterned Wafer Geometry (PWG), High-Resolution Transmission Electron Microscopy (HRTEM), Fourier Transform Infrared Spectroscopy (FTIR), Atomic Force Microscopy (AFM), n & k value, Weight meter, film thickness and wafer mass tracking. Under optimal annealing, impurity content in the SiO2 solid film is reduced while surface roughness remains unchanged. FTIR, n & k value, film thickness, and wafer mass analyses collectively support a proposed mechanism: hydrogen outgassing via Si-OH bond dissociation. This mechanism explains the observed changes in SiO2 solid film characteristics. This study provides valuable insights for optimizing stress and wafer warpage of TEOS-based SiO2 solid films in IC and Micro Electro-Mechanical System (MEMS) fabrication.
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Zhang et al. (2025) studied this question.
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