Noninvasive van der Waals Interface Integrations for Intrinsic 2D Semiconductor Characterization

"Plug-and-probe" van der Waals (vdW) integration preserves surfaces of low-dimensional semiconductors but suffers from interfacial charge transfer and weak electrostatic control at the dielectric-channel heterointerface, underestimating intrinsic optical and electrical properties. We introduce a MoS2-assisted noninvasive vdW integration method, achieving 94% intrinsic property expression. Controlled defect engineering on MoS2 creates sulfur vacancies and dangling bonds, enabling uniform atomic layer deposition (ALD) of high-κ HfO2 dielectrics. This resolves interfacial charge issues from conventional metal oxidation. Simultaneously, the ALD dielectric adsorbs onto source/drain contacts, eliminating the inner spacer in prior half-gate "plug-and-probe" structures. The fabricated monolayer MoS2 transistor arrays demonstrate exceptional performance with on-state current densities exceeding 10–6 A μm–1, a subthreshold swing of 79 mV decade–1, and an on/off current ratio of more than 108, surpassing those of all reported "plug-and-probe" devices. The transistors maintain >90% initial performance after 200 °C annealing and ambient storage for 60 days, confirming their exceptional thermal and temporal stability.