Asymmetric resonant ferroelectric tunnel junctions for simultaneous high tunnel electroresistance and low resistance-area product

Ferroelectric tunnel junctions offer potential for non-volatile memory with low power, fast switching, and scalability, but their performance is limited by a high resistance-area product and a low tunnel electroresistance ratio. To address these challenges, we propose a doped HfO2-based, silicon-compatible asymmetric resonant ferroelectric tunnel junction design with a TiO2 based quantum well embedded between two ferroelectric layers, replacing the conventional metal–ferroelectric–metal structure. Using a self-consistent coupling of the non-equilibrium Green’s function method with a Preisach-based model, we demonstrate that the quantum well enhances resonant tunneling effects, leading to a simultaneous reduction in the resistance-area product and a boost in the tunnel electroresistance ratio. The low-resistance state becomes more robust, while the high-resistance state is suppressed, improving readout speed and reducing power usage. We observed that incorporating a 2 nm TiO2-quantum well significantly enhances the tunnel electroresistance ratio, achieving a peaking value of ∼6.15 × 104%, while simultaneously minimizing the resistance-area product to 4.71 × 101 Ω-cm2 at 0.175 V. In addition, we analyzed the device performance in the presence of scattering, demonstrating the relative robustness against dephasing processes in comparison to the existing device designs. The proposed device also exhibits negative differential resistance, further enhancing its functionality. Our results confirm that this design enables scalable, energy-efficient, and high-performance non-volatile memory, making it a strong candidate for future memory technologies.