This approach finds better wirelength solutions in electronic designs, implying improved efficiency and cost savings.
Efficient routing optimization remains a pivotal challenge in Electronic Design Automation (EDA), as it profoundly influences circuit performance, power consumption, and manufacturing cost. The Rectilinear Steiner Minimum Tree (RSMT) problem plays a crucial role in this process by minimizing the routing length through the introduction of Steiner points. This paper proposes a reinforcement learning-driven RSMT construction model that incorporates a novel Selective Kernel Transformer Network (SKTNet) encoder to enhance feature representation. SKTNet integrates a Selective Kernel Convolution (SKConv) and an improved Macaron Transformer to improve multi-scale feature extraction and global topology modeling. Additionally, Self-Critical Sequence Training (SCST) is employed to optimize the policy by leveraging a greedy-decoded baseline sequence for the advantage computation. Experimental results demonstrate superior performance over state-of-the-art methods in wirelength optimization. Ablation studies further validate the contribution of this model, highlighting its effectiveness and scalability for routing.
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Li et al. (2025) studied this question.
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