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The demand for high-performance Radio Frequency (RF) CMOS RF SOI (Silicon on Insulator) switches has rapidly increased, driven by the need for advanced wireless technologies (1). In this paper we give new insights on high carbon incorporation, where a Si (1-y) C y layer with 1% of substitutional carbon (y = C sub ) is grown on 40 nm on top on silicon. This layer is used for Raised Source/Drain (RSD) to strain the Si channel, for reducing on-state resistivity (R on ) and which should result in a theoretical 16% gain in current (3), (4). Si (1-y) C y growth parameters were carefully optimized to increase C sub . Firstly, with the reduction of the temperature. Then, with H 2 carrier gas reduction and total pressure increase. These two process modifications have a positive impact on the carbon concentration, thanks to the higher growth rate, without layer relaxation (5).
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Chollet et al. (2024) studied this question.
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