A Unified Semiconductor-Device-Physics-Based Ballistic Model for the Threshold Voltage of Modern Multiple-gate MOSFETS

Based on the minimum conduction band edge caused by the minimum channel potential resulting from the quasi-3D scaling theory and the 3D density of state (DOS) accompanied by the Fermi-Dirac distribution function on the source and drain sides, a unified semiconductor-device-physics-based ballistic model is developed for the threshold voltage of modern multiple-gate (MG) transistors, including FinFET, W-gate MOSFET, and Nanosheet (NS) MOSFET. It is shown that the thin silicon, thin gate oxide, and high work function will alleviate the ballistic effects and resist the threshold voltage degradation. Besides, as the device dimension is further reduced to give rise to the 2D/1D DOS, the lowest conduction band edge is hence increased to resist the threshold voltage degradation. The nanosheet MOSFET exhibits the largest threshold voltage among the three transistors due to the smallest minimum conduction band edge caused by the quasi-3D minimum channel potential. Compared to P-type MOSFET (P-FET), the N-FET shows more threshold voltage because the electron has a more effective mass than the hole