Test and Characterization of Multilayer Ion Traps on Fused Silica

Ion traps are a promising architecture to host a future quantum computer. Several challenges, such as signal‐routing, power dissipation, and fabrication quality, need to be overcome to scale ion trap devices to hundreds of ions. Currently, ion traps are often fabricated on silicon substrates which result in high power dissipation. Substrates that lead to lower power dissipation are preferred. In this work, a multi‐metal layer ion trap is presented on a fused silica substrate that is fabricated and tested in an industrial facility. Its design and material‐stack are tailored to minimize power dissipation. Furthermore, the integrated temperature sensors are characterized and functionality down to 10 K is verified. Moreover, an automated wafer test is demonstrated to validate each trap chip prior to its integration into experimental setups. Subsequently, electric field noise and electric stray fields are characterized using a single trapped‐ion as a probe, showing an improvement in trap performance over similar trap designs realized on silicon substrates.