Recent progress of scaling down and in-memory logic for floating gate transistor

Floating-gate transistors have attracted considerable attention since they were invented. Because of their unique nonvolatile characteristics, they have significant applications in the field of data storage. However, with the advancement of technology, the traditional planar transistor technology has gradually encountered bottlenecks. This paper mainly introduces the basic structure and principle of floating gate transistor. The principle of 3D stacking technology and memory integration technology proposed in order to break the technical bottleneck has been illustrated. 3D stacking technology considerably increases the number of transistors by stacking multiple layers of floating gate transistors vertically together, and also brings greater integration and better performance to the chip. In addition, in order to cope with the needs of huge data and complex computing, the in-memory computing architecture based on floating gate transistors has also been proposed. The content and prospect of this paper are helpful to provide ideas and reference for the innovative development of floating gate transistors.