47‐5: Analyzing and Enhancing Display Quality in FRC Algorithm

The FRC algorithm is a commonly employed technique in LCD displays, aimed at enhancing the data bit depth through pixel dithering. However, it can also give rise to certain display issues such as noise, scrolling stripes, and flickering [1]. To address these problems comprehensively, this paper conducts an analysis from both temporal and spatial dimensions. It reveals that screen noise is closely associated with the uniformity of pixel data distribution throughout the entire FRC cycle time, while rolling stripes are linked to the spatial distribution of pixel data in both row and column directions. Furthermore, flickering arises due to variations in the number of FRC pattern pixels actually displayed per frame. The validity of these theories has been verified on an FPGA platform.