Fine Pitch and Low Temperature Nanocrystalline-Nanotwinned Cu and SiCN-to-SiO₂ Wafer-to-Wafer Hybrid Bonding

Nowadays, the fine-pitch wafer-to-wafer hybrid bonding with high-density integration is gaining traction for partitioning system-on-chip and high bandwidth memory solutions. This paper presents a novel wafer-to-wafer hybrid bonding technique utilizing a 2.5 μm fine-pitch NNT-Cu/SiCN-to-SiO2 hybrid bonding structure. The NNT-Cu pad exhibits controlled roughness and a protrusion of 2.5 nm, with a remarkable 93% preferred (111) orientation on the bonding surface. Wafer-to-wafer hybrid bonding is achieved at a reduced temperature of 200°C without a thermal compression process. This technology can be applied to the wafer batch bonding process and is compatible with existing manufacturing processes. It could be a potential integration process for advanced packaging.