A novel plasma etching technology of RIE-lag free TSV and dicing processes for 3D chiplets interconnect

This paper presents the development and application of a dual-frequency ICP etching system for the fabrication of 3D-IC. The system is designed to address the increasing need for efficient CPUs and HBM in data centers, in response to the global exponential growth of data. The dual-frequency ICP etching system enhances the etching process by increasing the electron temperature inside the plasma, promoting the dissociation of the process gas. The system's application in non-Bosch TSV etching technology and plasma dicing demonstrates its potential in providing smooth sidewalls and ensuring the long-term reliability of logic stacked devices. Furthermore, the introduction of a new etching method, the Dual TSV Process, minimizes aspect ratio dependent RIE-lag, enabling the fabrication of TSVs of two different diameters at a uniform depth. This technology increases the device design flexibility and enables the fabrication of higher density devices.