Advanced packaging is the growth engine of the semiconductor industry. In this work, we summarized the current progress of the plasma etching technology used in the advanced packaging, such as through silicon vias (TSV), silicon cavity etching, plasma dicing, wafer thinning, and descum. The 3D TSV is getting to have smaller critical dimension (CD) to maintain Moore's Law. Silicon wafer with less warpage can replace the organic carrier in fan-out wafer level packaging. Plasma dicing will be treated with smaller CD to fulfill the requirement of advanced process. Wafer thinning moves towards higher uniformity and higher etch rate in plasma etching. Descum has several functionalities required in the advanced packaging, which are surface activation, surface cleaning, and photoresist (PR)/polyimide (PI) striping/ashing. Looking into the future, plasma etching is still a key process for the advanced packaging.
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Yuanwei Lin (2024) studied this question.
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