The power delivery and high-speed signal demand in recent high performance and network chips drives a great effort in the interconnections not only at the chip level but also at the board level. The balance between the power and ground pins versus the signal pins creates complex board configurations to achieve the signal speed and signal quality the device needs. To efficiently connect the increasing Cu layers, a mixture of trace, micro-via, through-hole, and via-in pad plated over (VIPPO) structures can be used and increase the component density and functionality for the desired signal integrity. But utilizing and mixing these complex board configurations can induce solder joint interface defects known as Solder separation. The study presented here is a continuation of identifying the driving force of this defect mechanism. Through a series of in-situ resistance measurement during reflow and an in-situ optical observation of the joint melting and solidification behavior, accurate separation time and temperature are identified per design configuration and solder joint alloy combinations. 10x15mm 2 ball grid arrays (BGA) components were assembled on test boards, which contain a mixture of full VIPPO and VIPPO + backdrilled pads compared to full VIPPO only pads design as a baseline. Three different solder joint configurations were selected to investigate sensitivity to the solder separation defect. Full SAC305 joint as a baseline, Sn-Bi-In alloy system low melting temperature solder (LTS) joints are compared in hybrid, which have SAC305 solder balls assembled with Sn-Bi-Ag solder paste, and full LTS, which have Sn-Bi-In solder balls assembled with Sn-Bi-Ag paste. The results indicated that the separation defect in SAC305 can be mitigated with using the hybrid LTS and full LTS solder joint configuration. To identify the driving force of the solder separation defect mechanism, the surface of the test PCB was scanned with an optical profilometer from room temperature up to 200°C. The analysis identified that the z-axis expansion induced height difference between the full VIPPO pad and the backdrilled pad did not generated enough tension force during reflow for the hybrid LTS and full LTS solder joint configuration. The contribution parameters associated with the solder separation defect mechanism per board design configuration are discussed.
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Lee et al. (2024) studied this question.
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