We propose an advanced gate driver circuit with self-aligned InGaZnO (IGZO) thin-film transistors (TFTs) using common bootstrapped capacitive driving for multiple gate outputs. The proposed circuit represents a compact circuit area design and consistent falling time ( <tex-math notation="LaTeX">Tf) </tex-math> applicable to high-resolution white organic light-emitting diode (WOLED) displays. The four outputs of the unit stage exhibited uniform <tex-math notation="LaTeX">Tf </tex-math> in simulation and characterization ( <tex-math notation="LaTeX">Δ Tf < 0.02~μ </tex-math> s). This could be attributed to the calibrated discharging ability of pull-up transistors (T6s) having the same gate nodes, mainly resulted from the maintained gate-to-source voltage in T6s. We demonstrate a 13.3-inch-diagonal-size (166 pixels per inch) WOLED display using the proposed circuit, with uniform luminance and excellent circuit reliability.
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Kim et al. (2024) studied this question.
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