Design and Performance Analysis of 10T SRAM Cell Using Dopingless Vertical Nanowire Tunnel FET with NC Effect

In this manuscript the SRAM cell using IOT is proposed by the use of doping less vertical nanowire tunnel FET with NC effect NC-ED-VNW-TFET. Here the device is designed with dopingless substrate to avoid random dopant fluctuation (RDF) and expensive thermal budgeting and the doping is created by electrostatic technique. Thereafter the negative capacitance (NC) effect is introduced by using piezoelectric material to reduce the required voltage to its half level. By the use of N C effect, the device is significantly useful for low power application. After designing the device and reducing the applied voltage the SRAM is designed with this device. The performance parameters like leakage power, leakage current, read signal to noise margin (RSNM), write signal to noise margin (WSNM), read delay, write delay etc. of this circuit are been contrasted with the available data of published IOT SRAM cells. After comparison it is found that the proposed device is showing better results in comparison with the published device.