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As electricity generators from renewables become larger and more powerful, medium-voltage architectures play an increasingly important role in future power electronics systems. To further enhance the power-handling capacity, the implementation of parallel connections of Silicon Carbide (SiC) MOSFETs has gained widespread interest. However, it is important to note that the gate-loop performances of medium- and low-voltage modules are significantly different. Therefore, this paper presents a gate driver with discrete Miller clamp for parallel 10 kV SiC MOSFET modules and provides design considerations for future engineering reference.
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Yan et al. (2024) studied this question.
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