Metal Mask Rework Optimization for Metal with TaN Precision Resistor on it

In 0.18um CMOS designs, the choice of resistor materials commonly includes polysilicon and substrate well. While these materials serve their purpose, traditional silicon resistors are known to exhibit a high-temperature coefficient of resistance (TCR), which can introduce undesirable variations in performance under different temperature conditions. To counter this limitation and ensure robust performance across a range of operating temperatures, TaN thin film resistors are introduced into the metal loops of CMOS circuits. The paper investigates metal line short failures in Metal-6, particularly focusing on wafers undergoing photoresist rework. Notably, Metal-6 incorporates an additional TaN module compared to other inter-metal layers. This inclusion necessitates a thermal process with temperatures lower than the critical point of copper phase change. Consequently, this lower-temperature process increases the likelihood of copper precipitation, where copper is added to aluminum to minimize migrations. However, copper precipitation can result in the hardening of AlCu metal, making it challenging to etch through completely. To address the metal line short issue, the paper proposes a solution involving the replacement of the photoresist rework tool with a type-B tool featuring a lower-temperature platen. This adjustment helps mitigate the effects of copper precipitation, thereby reducing the occurrence of metal line short failures in Metal-6.