Novel Multi-Level Coding and Architecture Enabling Fast Random Access for Flash Memory

This study introduces a novel multi-level coding and architecture designed to enhance random access time in multi-level flash memory. By employing a strategy of sharing and storing multi-level data across multiple memory cells, we address the challenge of increased read cycles typically associated with multi-level data. This architecture, which does not require new processes or materials, achieves one-cycle reading in MLC, equating its random access time with that of SLC, and ensures rapid random access in TLC.