Facile DUV Irradiated Solution-Processed ZrO₂/In₂O₃ for Low Voltages FET Applications

Prime challenges for device integration in metal–oxide semiconductors are low voltage operations, low thermal budget, and large area stable thin films for high-performance field-effect transistors (FETs). Although more, high equipment costs and device scalability issues remain challenges with thin film processing. Henceforth, here we present fully solution-processed thin indium oxide (In <tex-math notation="LaTeX">₂</tex-math> O <tex-math notation="LaTeX">₃</tex-math> ) ( <tex-math notation="LaTeX">Eg</tex-math> <tex-math notation="LaTeX">~</tex-math> 3.2 eV) semiconducting film integrated with high- <tex-math notation="LaTeX">κ</tex-math> ( <tex-math notation="LaTeX">~</tex-math> 14.68) ZrO <tex-math notation="LaTeX">₂</tex-math> dielectric thin film for high-performance FETs. Top gate bottom contact (TGBC) architecture is optimized for driving low voltage operations, whereas a low thermal budget ( <tex-math notation="LaTeX">$<$</tex-math> 300 <tex-math notation="LaTeX">∘</tex-math> C) has been made possible with ( <tex-math notation="LaTeX">~</tex-math> 1 min) facile deep-ultraviolet (DUV) ( <tex-math notation="LaTeX">~</tex-math> 254 nm) irradiation. Al/ZrO <tex-math notation="LaTeX">₂</tex-math> /In <tex-math notation="LaTeX">₂</tex-math> O <tex-math notation="LaTeX">₃</tex-math> /Pt/SiO <tex-math notation="LaTeX">₂</tex-math> /Si FETs operate well below ( <tex-math notation="LaTeX">~</tex-math> 0.5 V), with a high <tex-math notation="LaTeX">I_on</tex-math> / <tex-math notation="LaTeX">I_off</tex-math> ratio ( <tex-math notation="LaTeX">~</tex-math> 1.1 <tex-math notation="LaTeX">×</tex-math> 10 <tex-math notation="LaTeX">⁴</tex-math> ), low subthreshold swing (SS) ( <tex-math notation="LaTeX">~</tex-math> 104 mV/dec), threshold voltage ( <tex-math notation="LaTeX">~</tex-math> <tex-math notation="LaTeX">$-$</tex-math> 0.3 V), transconductance ( <tex-math notation="LaTeX">~</tex-math> 1.44 <tex-math notation="LaTeX">μ</tex-math> s @ 0.5 V), respectively. The effective field-effect mobility in the linear region is <tex-math notation="LaTeX">~</tex-math> 44.2 cm <tex-math notation="LaTeX">²</tex-math> /Vs at <tex-math notation="LaTeX">VDS</tex-math> <tex-math notation="LaTeX">$=$</tex-math> 0.1 V, and in the saturation region is <tex-math notation="LaTeX">~</tex-math> 15.0 cm <tex-math notation="LaTeX">²</tex-math> /Vs at <tex-math notation="LaTeX">VDS</tex-math> <tex-math notation="LaTeX">$=$</tex-math> 0.5 V, respectively. The interface trap density <tex-math notation="LaTeX">~</tex-math> 2.5 <tex-math notation="LaTeX">×</tex-math> 10 <tex-math notation="LaTeX">¹²</tex-math> /eV cm <tex-math notation="LaTeX">²</tex-math> for ZrO <tex-math notation="LaTeX">₂</tex-math> /In <tex-math notation="LaTeX">₂</tex-math> O <tex-math notation="LaTeX">₃</tex-math> was investigated by conductance ( G - V ) technique, also electrical stress investigations were performed for reliability analysis. The gate leakage current is <tex-math notation="LaTeX">~</tex-math> 7.05 nA/cm <tex-math notation="LaTeX">²</tex-math> at <tex-math notation="LaTeX">VGS</tex-math> <tex-math notation="LaTeX">$=$</tex-math> 1 V. This work demonstrates the high performance of DUV irradiated solution processed Al/ZrO <tex-math notation="LaTeX">₂</tex-math> /In <tex-math notation="LaTeX">₂</tex-math> O <tex-math notation="LaTeX">₃</tex-math> /Pt thin-film transistor (TFT) structures.