A pseudo-3D regulated DC-DC boost converter, based on a modified Dickson charge pump topology (DCP), is presented as an effective solution to achieve optimized current conversion efficiency. In this solution, currents of the clock generator are directly conveyed to the DCP, with the result of reducing the power wasted by drivers and oscillator. The whole converter implements two concurrent feedback loops: the external one, constituted by the output voltage divider and the error amplifier, serving to set the output voltage; the internal one, included in the DCP core, automatically tunes the clock frequency and makes the system efficient in terms of current conversion. A prototype of the design was implemented in a standard 130-nm CMOS process and its operation was tested and compared to the previous arts.
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Ballo et al. (2024) studied this question.
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