Quantum dot (QD) formation in multiple-gate FETs is a promising solution to scale QD-based devices. In this work, we report on the superiority of the quantum mode performance of SOI-gate-all-around nanowire FETs (GAA NWFETs) compared to the bulk FinFETs. A classical comparison is followed by an investigation based on the quantum perspective. The Coulomb blockade region is analyzed through the drain current oscillations at cryogenic temperatures. Performance metrics of the FET channel QDs are compared. NWFETs show better quantum confinement properties at much relaxed geometries than the bulk FinFETs, which makes them a potential candidate for scalable integration of QD-based qubits for the quantum processing units (QPUs). To assist in the design of QD-based charge/spin qubits, a subcircuit-based proximity charge sensing model is proposed. The model augments the existing BSIM CMG-based compact model to capture the charge sensing characteristics of a single-electron transistor (SET). This, in turn, can aid the layout design for CMOS-based QPUs.
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Sharma et al. (2024) studied this question.
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