A New 3-Phase 2-Level Buck Inverter with Switching Loss Improvement

This paper proposes a 3-phase 2-level inverter configuration combined with a buck DC-DC converter to improve the switching loss of semiconductor devices. Compared to the traditional 3-phase 2-level inverter configuration, this configuration can reduce the number of switching times on the inverter side by about 2/3 compared to the sine Pulse Width Modulation technique (sine PWM) and 1/2 compared to the Discontinuous PWM (DPWM). Different from traditional configurations and techniques (DC-link voltage is constant), this configuration controls DC-link voltage to change and equal to the maximum pole voltage on the inverter side. Hence, the phase with the maximum and minimum voltages has no switching. In addition, compared to traditional techniques, the switching voltage of the switches inverter side is also significantly decreased. To verify the advantage of reducing switching loss, the simulation results of power loss analysis were performed using PSIM and PLECS software and experimented on the experimental model. In experimental results, when the output power is 900 W, the proposed configuration efficiency is 3.36% larger than the traditional configuration.