A 32Gb/s Equalizer with Adaptive T-Coil Input Matching and Fullrate DFE in 28nm CMOS

This paper introduces a wireline receiver featuring a 32Gb/s data rate with 32dB channel loss. The design incorporates an adaptive inversed T-coil for input matching, enabling effective compensation of high-frequency gain without violating return loss specifications. The T-coil, coupled with a continuous-time linear equalizer (CTLE) and low-frequency equalizer, achieves a 25dB gain compensation. The receiver includes a full-rate direct feedback decision feedback equalizer (DFE) structure, followed by an oversampling clock data recovery (CDR) circuit. In compliance with a 32dB channel, the proposed receiver demonstrates a 0.13UI jitter tolerance under BER<10 -12 at 100MHz during testing. Additionally, the receiver's input port meets the electrostatic discharge (ESD) test requirements for 2kV Human Body Mode (HBM).