With the recent advances in deep neural networks (DNN), researchers have proposed various hardware accelerators. However, many neglected the energy consumption of off-chip memory access for weight and activation data, which can dominate the total energy consumption. To reduce off-chip data traffic, some works adopted aggressively quantized arithmetic, such as 1-4b fixed-point (FX1-FX4) or block-floating-point (BFP). However, they achieve only a limited computation precision, hurting DNN inference accuracy.
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Zhang et al. (2024) studied this question.
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