Broadband Low-Loss Fan-In Chip-to-Package Interconnect Enabling System-in-Package Applications Beyond 220 GHz

This paper presents a broadband low-loss fan-in wafer level ball grid array (WLB) vertical through-mold-via (TMV) interconnect that enables highly integrated system-in-package (SiP) applications beyond 220 GHz. The dedicate advantage of the proposed approach is to further minimize the separation between package components (e.g., antenna in package (AiP)) and on-chip receiver or transmitter chain. To demonstrate the robustness of the TMV interconnect design, the necessity for co-simulation of the integrated circuit (IC) package and the IC itself during the package-design is shown. Therefore, an in-depth analysis of the suppression of parasitic mode oscillation inside silicon is carried out. Furthermore, the parasitic radiation loss at the TMV interconnect discontinuity is given and a verification of the proposed TMV due to high agreement of simulation and measurement results is demonstrated. The interconnect has been verified with a measured 10 dB return loss bandwidth of 38 GHz and a de-embedded insertion loss of less than 2.8 dB at 275 GHz, which enables a compact low-loss broadband signal transition from active IC components in the backend-of-line (BEOL) to passive components in package. Compared to fan-out WLB, the developed fan-in WLB solution enables higher integration density of active and passive components with the shortest interconnects for minimal insertion loss. Thus, the proposed fan-in TMV packaging provides a very compact, easy-to-assemble and cost-efficient alternative for SiP designs for future broadband communication and sensing solutions.