Thermo-Mechanical Compact Model to Simulate Solder Fatigue of QFN packages

Microelectronic systems face persistent challenges in solder joint reliability despite years of research. Qualification tests during product development aim to ensure sufficient field life but are time-consuming and costly. Thermo-mechanical simulations contribute to 'first pass' qualification by assessing damage accumulation in solder joints per thermal cycle. Mismatched thermal expansion between components and PCBs, along with strains due to clamping, contribute to an application-specific damage accumulation in solder joints. Co-design along the supply chain can provide a system perspective, but sharing simulation models is hindered by proprietary concerns. Compact models, preserving proprietary information, are vital for efficient co-design by offering faster system-level simulations with adequate accuracy. This work introduces a method for constructing a thermo-mechanical compact model from a full-fidelity model. By leveraging key assumptions about board-level reliability tests, the reduction scheme to construct the compact model is simplified. The outcomes include a piece-wise linear compact model and the use of rigid surfaces to reduce the number of interface nodes. Applied to a QFN package, the results demonstrate an accuracy within ~ 10% for solder joint damage. In essence, this method shows promise in enhancing qualification efficiency, cutting costs, and improving solder joint reliability in microelectronic systems through thermo-mechanical compact models.