Predictive Reliability Assessment Workflow for System-Level Reliability of Solder Interconnections

Electronic components mounted on high-density printed circuit boards (PCBs) within housings often exhibit reduced reliability compared to board-level reliability (BLR) tests. To ensure the reliability of the final product, manufacturers utilise simulations and predictive reliability methods. However, managing tasks, simulation models, and their results poses a difficult challenge. This paper proposes a workflow for system-level reliability assessment of solder interconnections. The workflow defines the development team's responsibilities, facilitates task planning, and provides valuable data for risk mitigation. We create a simulation workflow for system-level reliability (SLR) assessment by calibrating the simulation models at the board level. Following the developed workflow, the system-level analysis can identify the solder connections at risk of failure and suggest improvements. The research underscores the critical importance of high-quality input data and the availability of experimental BLR results for developing and validating reliable predictive models. This study provides valuable experimental board-level reliability (BLR) data and proposes a structured framework for system-level reliability evaluation.