Reduced-Order Modeling for Efficient Reliability Assessment of Package-Board Interactions

In the development cycle of microelectronic components, comprehensive reliability assessments via physical hardware experiments are costly and time-consuming, particularly when evaluating high-temperature operation and power thermal cycle endurance. To reduce manufacturing costs and accelerate the product development cycle, computer models, provided for example by the finite element method, are applied for virtual reliability tests. For the assessment of complete PCB assemblies, current solutions exhibit limitations due to the lack of validated package models from manufacturers. These models should also protect intellectual property by concealing detailed material and geometry information. This paper introduces a new solution based on Model-Order Reduction using the Krylov Subspace-Based method. A novel application concept is presented, and the technique is demonstrated through two case studies focusing on the thermo-mechanical reliability of a ceramic capacitor and a Fan-Out package model. The results indicate that the model reduction method does not affect the reliability modeling outcomes in either case. Given its potential, this method, currently limited to linear elastic problems, will be further developed.