Enhancing Noise Immunity of Schmitt Triggers through Dual PMOS Transistor

This brief highlights the noise immune Schmitt trigger circuit. The proposed circuit is configured with dual PMOS feedback circuitry, which makes the leakage power resilient. The proposed circuit has 1.84x, 2.35x less dynamic and leakage power and 1.74x improvement in propagation delay. The proposed circuit is noise immune as 0.93x improvement in hysteresis width. All simulation work has been handled by Cadence Virtuosos tool at 45 nm technology node.