To enhance the overall performance of the phase-locked loop frequency synthesizer, this paper presents a low-phase noise dual-core voltage-controlled oscillator (VCO) designed with a Class-F₂,₃ architecture. Utilizing the 55-nm CMOS, the wide tuning range is achieved through variable capacitance and switch capacitor arrays. The use of adjacent-layer coupled transformer structures, with the adjustment of capacitance ratios in two resonant cavities, facilitates low phase noise. Postsimulation results indicate that the frequency tuning range of the VCO is 11.74-13.68 GHz. The VCO achieves phase noise of -123.66 dBc/Hz@1MHz at 11.74 GHz with figure of merit (FoM) of 185.7dBc/Hz and FoMT of 189.9dBc/Hz. The oscillator core consumes 67mW at 0.9V supply.
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Sun et al. (2024) studied this question.
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