Neuromorphic computing, which mimics the functions of biological brains, offers improvements in both latency and energy efficiency over typical von Neumann computing architectures. Spiking neural networks can be especially power-efficient because they encode information temporally and can use more sparse electrical inputs. Here, we study the design of volatile memristors (variable resistors with memory) for neuronal devices, with particular consideration toward the feasibility of all-on-chip oscillation using built-in capacitance. We use circuit simulations to model the behavior of oscillator neurons with a range of realistic material properties. We find that energy inputs increase with insulating-phase resistivity, thermal conductivity, and device aspect ratio. However, we also find that the minimum capacitance needed for oscillation decreases with increasing insulating-phase resistivity, which opposes the constraints for power efficiency. Based on published data on NbO <tex-math notation="LaTeX">₂</tex-math> , VO <tex-math notation="LaTeX">₂</tex-math> , and EuNiO <tex-math notation="LaTeX">₃</tex-math> , we find that existing materials can be engineered for all-on-chip spiking using their parasitic capacitance.
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Schneble et al. (2024) studied this question.
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