In this work, we demonstrate indium–gallium–zinc oxide (IGZO) transistors fabricated on an 8-in wafer with high uniformity, steep subthreshold slope, and high reliability under positive bias temperature instability (PBTI) stress. The impact of channel compositions, gate dielectrics, and post-treatment conditions on PBTI degradation is systematically characterized and analyzed. The negative threshold voltage ( <tex-math notation="LaTeX">VTH) </tex-math> shift under positive stress is found to be determined by both hydrogen (H) and oxygen vacancy ( <tex-math notation="LaTeX">VO) </tex-math> , which is the dominating factor with the highest time exponent in PBTI of IGZO transistors. By reducing H concentration and suppressing <tex-math notation="LaTeX">VO </tex-math> generation by process engineering in gate-stack, semiconductor channel, and post-treatment condition, IGZO transistors with high PBTI reliability are demonstrated, achieving a low <tex-math notation="LaTeX">Δ VTH </tex-math> of 11 mV at 95 °C, <tex-math notation="LaTeX">Vₛₜᵣₑₛₛ </tex-math> of 3 V ( <tex-math notation="LaTeX">tₒₓ </tex-math> = 7 nm, EOT = 3.2 nm by <tex-math notation="LaTeX">C </tex-math> – <tex-math notation="LaTeX">V </tex-math> measurements, and <tex-math notation="LaTeX">EOX </tex-math> of 3.7 MV/cm), and <tex-math notation="LaTeX">tₛₜᵣₑₛₛ </tex-math> of 2 ks.
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Lin et al. (2024) studied this question.
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