Advanced VLSI-based digital image contrast enhancement: A novel approach with modified image pixel evaluation logic

This research uses an extremely memory-intensive and power-efficient very-large-scale-integration (VLSI) architecture to perform nonlinear scaling on pictures. Images can be scaled either up or down so that they can be adapted to the differing resolutions of a variety of devices, such as cameras and printers. Photography with a high resolution calls for significantly more storage space and processing power. The branch of image processing known as “image fusion” has recently had a meteoric rise in prominence. The rapidly growing usage of digital imagery in remote sensing and satellite applications has led to an increase in the need to both store and process massive amounts of picture data. This demand has resulted in an increase in the availability of storage space. Traditional fusion methods produce spatial distortions despite their generally high level of spatial performance. Because of this, the discrete wavelet transformation (DWT), currently the most efficient approach for processing images, focuses on finding a solution to this problem. Within the scope of this investigation, we propose the modified image pixel evaluation logic (MIPEL), a functional method for incorporating the lifting-based strategy utilized in DWT-based picture fusion. In order to avoid excessive delays, high-resolution photo processing typically makes use of hardware processing, which necessitates the utilization of more complex apparatus and more time. In this work, the hardware description language verilog is employed to evaluate the effectiveness of various fundamental approaches to the enhancement of pictures. VHDL is a relatively recent method that has replaced more traditional simulations in the process of producing results for signal processing. It does this by allowing rapid access to physical VLSI representations. Utilizing the proposed MIPEL as a starting point, this study aims to design, model, simulate, and develop several different strategies for enhancing photos using FPGA. Because they take place on the pixel level and in the immediate neighborhood of a pixel, the enhancements that may be made to an image can be thought of as point processing procedures. VLSI architecture is developed for contrast augmentation for low-contrast source photos using pixel-based image fusion, and in the simulation results that followed, we offer findings that clearly illustrate the efficiency of this technology.