Design and analysis of 3-bit Low Power Digitally Controlled Oscillator using Pseudo-NMOS inverter

This work presents the design and analysis of a 3-bit low power digitally controlled oscillator (DCO) using a Pseudo-NMOS inverter, implemented by utilizing the technology of CMOS having TSMC 90nm. The innovative design of the low power DCO circuit incorporates an NMOS switching network. This circuit design of DCO is implemented in the ring topology using pseudo-NMOS inverters as delay cells. The alteration in frequency and power takes place at a supply voltage of 3.2 V when we modify the digital control bits of the switching network. The proposed 3- bit DCO illustrates variations in frequency from 155 GHz to 276.3 GHz and power from 161.2 mW to 544.7 mW. However, with the variation in voltage from 2.5V to 3.2V, frequency shows variation from 62.89GHz to 155GHz and power from 121.5 mW to 161.2 mW.