A scalable integrated photonics tensor core for large vector-matrix multiplications

Optical computing promises to play a major role in hardware chips dedicated to artificial intelligence (AI). Digital electronics, when employed in computing hardware, face the sunset of Moore's law and the acknowledged end of Dennard Scaling (energy density of shrinking transistors). In response to these limitations, a paradigm shift towards nondigital processing is on the horizon. In optical computing devices for AI, the dominant mathematical operation is vectormatrix multiplication. It is typically limited to very small vector and matrix sizes. Most approaches don't allow for significant scaling. In this context, our work focuses on the development of a silicon photonics tensor core that exhibits a unique scalability feature, enabling effective expansion to accommodate large matrix sizes. This scalability is deemed essential for the realization of meaningful AI accelerator products leveraging photonic hardware.