An 850 nm monolithic optical receiver is realized with the standard 28 nm complementary metal-oxide-semiconductor (CMOS) technology without any process modification or design rule violation. The single-chip optical receiver contains a Si avalanche photodetector (APD) and an underdamped trans-impedance amplifier (TIA) which compensates the Si APD bandwidth limitation. The Si APD characteristics are measured and modeled with an equivalent circuit that accurately emulates the Si APD frequency responses and the noise characteristics. Using this model, the optimal design of the receiver circuit is carried out. The fabricated monolithic optical receiver achieves 20 Gb/s operation.
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Yang et al. (2024) studied this question.
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