High‐Performance Nd: AIZO/Al₂O₃ Dual Active Layer Design Without Thermal Annealing: High‐Speed Electron Transport and Defect Modification in Thin Film Transistors

Flexible wearable electronics have been developing rapidly in recent years, and one of its core devices, thin‐film transistor (TFT), is also attracting attention. Current TFT preparation processes usually require high annealing temperatures (>350 °C), which is not conducive to their application on most flexible substrates (PET, PEN, nanopaper, etc.). In this article, a strategy for the room temperature preparation of Nd:AIZO/Al 2 O 3 dual‐layer TFT devices is proposed, which has appreciable electrical properties without additional annealing treatment. Taguchi orthogonal experimental methods are used to investigate the effects of three essential process parameters on the performance of the films and devices. As Nd:AIZO deposition time decreases and Al 2 O 3 oxygen percentage and time during deposition increase, the μ sat and SS of TFT devices are improved. With the preferred combination of parameters applied to the device preparation, the device exhibits a saturation mobility μ sat of 24.3 cm 2 V −1 s −1 , a threshold voltage V th of −1.4 V, a subthreshold swing SS of 0.21 V decade −1 and an I on / I off ratio of 4.26 × 10 8 . The ultra‐thin Al 2 O 3 layer act as defect modification and form high‐speed electron transport in channel layer. The room temperature preparation of the dual‐layer TFT process proposed in this article is compatible with large‐size low‐cost flexible substrates. It has great potential for application in green flexible wearable electronics.