This paper presents an analog-assisted digital low dropout (LDO) voltage regulator for implantable medical devices (IMD). In parallel to the digital loop, a low-power, subthreshold transistor-based amplifier is used to improve the transient behavior of the regulator. To improve the tracking speed and steady-state behavior of the digital loop, a segmented array architecture is employed. For overshoot and undershoot detection in the regulator output, a single reference, dynamic window detector circuit is proposed that consumes zero static power. A 0.5 μW, subthreshold CMOS voltage reference is proposed in this work operates with 0.9 V minimum power supply voltage. The measured output voltage of the regulator is 1.11 V with PSRR of 26.4 dB at 10 kHz. Fabricated in a 65-nm CMOS process, the voltage regulator occupies a die area of 0.104 mm 2 including the voltage reference and the window detector circuit.
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Jain et al. (2024) studied this question.
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