A New High Density 3D Stackable Via RRAM for Computing-in-Memory SOC Applications

A novel 3D stackable Via resistive random access memory (RRAM) latch and Via RRAM logic gates implemented in 16-nm FinFET logic process for computing-in-memory (CIM) applications are proposed. Via RRAM latch array can provide more than 60 Mb/mm2 of latch storage density to achieve stable full-swing high-speed output. By simplifying the readout circuit, latch array allows flexible configuration in advanced SOC. Three-Dimensional Via RRAM logic gates compute the stored data internally. The features show a promising way to reduce the von Neumann bottleneck.